The ISD division of onsemi is seeking a Mask Layout Designer who is self-driven and motivated to join their IIS Mixed Signal Layout Team located in Richardson, TX, Pocatello, ID or Lower Gwynedd, PA. As a Mask Layout Designer, you will have the opportunity to work with a team of layout designers and design engineers developing high quality Analog and Digital CMOS circuits. This position needs a person with a solid background in Physical layout, Physical Verification, and some Place and Route knowledge. Here at onsemi we have a great culture of teamwork in an environment of discovery, automation, and quality product. We have teams in Pennsylvania, Utah, Idaho, and in addition, we work with other design centers in Texas, Brno, and Czech Republic. Our team seeks to meet the demands of new products, technologies, customers, and capabilities at onsemi.

As a Mask Layout Designer, you will be responsible for the following:

• Perform physical design (layout) of analog and mixed-signal cells

• Generate verification (DRC, LVS, ERC) and debug using the Calibre CAD tool

• Lead Chip-level assembly, optimization and verification

• Interface with design engineers to find optimal physical design solutions to complex analog/mixed-signal circuit designs

• Follow Production quality workflow and documentation procedures

• Understand how to generate and validate physical views that are useable in APAR tools

• Be coachable in coming up to speed and contributing to current workflows and help improve efficiency

• Participate and support team members in their work and production needs

• Manage your work to accomplish the tasks needed for maintaining production schedules

• Provide technical expertise, guidance, and support to other team members where possible

• Communicate detailed information needed for quality work throughout the production cycle

This position is Hybrid/Remote/Open to several locations.

Qualifications

Successful candidates for this position will have:

• Strong aptitude for IC layout and CAD-based design

• Proficiency using Cadence Virtuoso and Mentor Calibre

• Extensive experience with fundamental analog blocks (ADCs, DACs, bandgaps, oscillators, op amps, drivers, etc.)

• Extensive experience with top level layout and verification of Mixed signal blocks

• Mastery of critical layout techniques such as matching, shielding, design for latch-up, IO’s, etc.

• Cadence Abstract tool experience to produce lef files for APAR deliverables

• Experience with understanding pros and cons in how IP layout views interact with P&R tools

• Place and route experience a plus

• Demonstrated ability to interpret design schematics, to ask clear questions, and to produce first-time-right physical designs

• Good personal skills, willing to work in large teams

• Associates degree in electronics and/or equivalent industry experience

• Fluency in the English language

• Able to work with a group of engineers inside and outside of the country across multiple time zones

• Ability to be mentored by and help others learn in a positive team development roll

• Understanding of scripting for automation of tasks is a bonus

#LI-SK1

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

Equal Employment Opportunity onsemi is an Equal Opportunity and Affirmative Action employer. The Company maintains policies and practices that are designed to prevent discrimination or harassment against any qualified applicant or employee to the extent prohibited by federal, state and local laws and regulations. By way of example, discrimination on the basis of race (actual or perceived), ethnicity, color, religion (including any terms or conditions that would require a person to violate or forgo a sincerely held practice of their religion, unless it causes a bona fide undue hardship on the conduct of business), ancestry, national origin, citizenship, sex (including pregnancy, childbirth, or related medical conditions), age, marital status, sexual orientation, physical or mental disability, medical condition, genetic information (including test results), status as a protected veteran, uniform service member status or discharge status, political affiliation, union membership, gender identity or gender expression, certain arrest or criminal history records, homelessness, use of lawful products outside of work during nonworking hours, protective order status, or any other characteristic protected by applicable law is prohibited.

If you are an individual with a disability and require a reasonable accommodation to complete any part of the application process, or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, you may contact US.HR@onsemi.com for assistance.

Please visit https://bit.ly/ApplicantPosters to review your rights as an applicant: EEO is the Law, Employee Polygraph Protection Act, Your Rights Under USERRA, Employee Rights Under the Family Medical Leave Act, EEO is the Law Poster Supplement/Pay Transparency Policy Statement, and Right to Work/E-Verify Poster.

Primary Location : United States-TX-Richardson

Job : Engineering

Travel : No

Job Posting : Feb 21, 2023, 6:54:09 PM